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 (R)
LY61L6416
Rev. 1.8
64K X 16 BIT HIGH SPEED CMOS SRAM
REVISION HISTORY
Revision Rev. 1.0 Rev. 1.1 Rev. 1.2 Rev. 1.3 Rev. 1.4 Rev. 1.5 Rev. 1.6 Rev. 1.7 Rev. 1.8 Description Initial Issue Deleted Icc1 Spec. Revised Truth Table Deleted Data Retention Waveform(2)(UB & LB controlled) Revised the typo in Page 1 Added PKG Type : 48-ball 6mm x 8mm TFBGA Revised Test Condition of ISB1/IDR Added I Grade Spec. Revised VTERM to VT1 and VT2 Added -20ns Spec. Added LL Spec. Revised Test Condition of ISB Revised FEATURES & ORDERING INFORMATION Lead free and green package available to Green package available Deleted TSOLDER in ABSOLUTE MAXIMUN RATINGS Added packing type in ORDERING INFORMATION Issue Date Jul.25.2004 Sep.21.2004 Jun.20.2005 Feb.13.2006 Jun.13.2007 Feb.4.2008 Mar.31.2008 Aug.7.2008 Apr.17.2009
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 0
(R)
LY61L6416
Rev. 1.8
64K X 16 BIT HIGH SPEED CMOS SRAM
GENERAL DESCRIPTION
The LY61L6416 is a 1,048,576-bit low power CMOS static random access memory organized as 65,536 words by 16 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. The LY61L6416 is well designed for low power application, and particularly well suited for battery back-up nonvolatile memory application. The LY61L6416 operates from a single power supply of 3.3V and all inputs and outputs are fully TTL compatible
FEATURES
Fast access time : 8/10/12/15/20ns Low power consumption: Operating current : 115/105/95/85/70mA (TYP.) Standby current : 0.6mA (TYP.) 100A( (MAX. for 20ns LL version) Single 3.3V power supply All inputs and outputs TTL compatible Fully static operation Tri-state output Data byte control : LB# (DQ0 ~ DQ7) UB# (DQ8 ~ DQ15) Data retention voltage : 2.0V (MIN.) Green package available Package : 44-pin 400 mil TSOP-II 48-ball 6mm x 8mm TFBGA
PRODUCT FAMILY
Product Operating Family Temperature 0 ~ 70 LY61L6416 0 ~ 70 LY61L6416 0 ~ 70 LY61L6416(LL) -20 ~ 80 LY61L6416(E) -20 ~ 80 LY61L6416(E) LY61L6416(LLE) -20 ~ 80 -40 ~ 85 LY61L6416(I) -40 ~ 85 LY61L6416(I) -40 ~ 85 LY61L6416(LLI) Vcc Range 3.15 ~ 3.6V 3.0 ~ 3.6V 3.0 ~ 3.6V 3.15 ~ 3.6V 3.0 ~ 3.6V 3.0 ~ 3.6V 3.15 ~ 3.6V 3.0 ~ 3.6V 3.0 ~ 3.6V Speed 8/10ns 12/15/20ns 20ns 8/10ns 12/15/20ns 20ns 8/10ns 12/15/20ns 20ns Power Dissipation Standby(ISB1,TYP.) Operating(Icc,TYP.) 0.6mA(TYP.) 115/105mA 0.6mA(TYP.) 95/85/70mA 100A(MAX.) 70mA 0.6mA(TYP.) 115/105mA 0.6mA(TYP.) 95/85/70mA 100A(MAX.) 70mA 0.6mA(TYP.) 115/105mA 0.6mA(TYP.) 95/85/70mA 100A(MAX.) 70mA
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 1
(R)
LY61L6416
Rev. 1.8
64K X 16 BIT HIGH SPEED CMOS SRAM
PIN DESCRIPTION
SYMBOL DESCRIPTION Address Inputs Chip Enable Input Write Enable Input Output Enable Input Lower Byte Control Upper Byte Control Power Supply Ground
FUNCTIONAL BLOCK DIAGRAM
Vcc Vss
A0 - A15 CE#
DQ0 - DQ15 Data Inputs/Outputs
DECODER 64Kx16 MEMORY ARRAY
A0-A15
WE# OE# LB# UB# VCC VSS
DQ0-DQ7 Lower Byte DQ8-DQ15 Upper Byte
I/O DATA CIRCUIT
COLUMN I/O
CE# WE# OE# LB# UB#
CONTROL CIRCUIT
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 2
(R)
LY61L6416
Rev. 1.8
64K X 16 BIT HIGH SPEED CMOS SRAM
PIN CONFIGURATION
A4 A3 A2 A1 A0 CE# DQ0 DQ1 DQ2 DQ3 Vcc Vss DQ4 DQ5 DQ6 DQ7 WE# A15 A14 A13 A12 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 TSOP II 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE# UB# LB# DQ15 DQ14 DQ13 DQ12 Vss Vcc DQ11 DQ10 DQ9 DQ8 NC A8 A9 A10 A11 NC
ABSOLUTE MAXIMUN RATINGS*
PARAMETER Voltage on VCC relative to VSS Voltage on any other pin relative to VSS Operating Temperature Storage Temperature Power Dissipation DC Output Current SYMBOL VT1 VT2 TA TSTG PD IOUT RATING -0.5 to 4.6 -0.5 to VCC+0.5 0 to 70(C grade) -20 to 80(E grade) -40 to 85(I grade) -65 to 150 1 50 UNIT V V W mA
*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 3
LY61L6416
A B C D E F G H
LB# OE# DQ8 UB#
A0 A3
A1 A4 A6 A7 NC
A2
NC
CE# DQ0 DQ1 DQ2 DQ3 Vcc DQ4 Vss
DQ9 DQ10 A5 Vss DQ11 NC Vcc DQ12 NC DQ14 DQ13 A14 DQ15 NC NC A8 A12 A9
A15 DQ5 DQ6 A13 WE# DQ7 A10 A11 NC
1
2
3 4 TFBGA
5
6
(R)
LY61L6416
Rev. 1.8
64K X 16 BIT HIGH SPEED CMOS SRAM
TRUTH TABLE
MODE Standby Output Disable Read CE# H L L L L L L L L OE# X H H L L L X X X WE# LB# X H H H H H L L L X L X L H L L H L UB# X X L H L L H L L I/O OPERATION DQ0-DQ7 DQ8-DQ15 High - Z High - Z High - Z High - Z High - Z High - Z DOUT High - Z High - Z DOUT DOUT DOUT DIN High - Z High - Z DIN DIN DIN SUPPLY CURRENT ISB,ISB1 ICC ICC
Write
Note:
ICC
H = VIH, L = VIL, X = Don't care.
DC ELECTRICAL CHARACTERISTICS
PARAMETER Supply Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Average Operating Power supply Current SYMBOL VCC VIH *2 VIL ILI ILO VOH VOL
*1
TEST CONDITION -8/-10 -12/-15/-20
VCC VIN VSS VCC VOUT VSS, Output Disabled IOH = -4mA IOL = 8mA Cycle time = Min. CE# = VIL , II/O = 0mA Other pins at VIH or VIL CE# = VIH, other pins at VIH or VIL
8/10/12/15/20 CE# VCC - 0.2V Others at 0.2V or VCC - 0.2V 20LL
MIN. 3.15 3.0 2.0 - 0.3 -1 -1 2.4 -
TYP. 3.3 3.3 -
*4
MAX. UNIT 3.6 V 3.6 V VCC+0.3 V 0.8 V 1 A 1 0.4 150 120 100 90 75 10 *5 3 6 100* A V V mA mA mA mA mA mA mA A
ICC
-8 -10 -12 -15 -20
Standby Power Supply Current
ISB ISB1
115 105 95 85 70 3 0.6 20
Notes: 1. VIH(max) = VCC + 3.0V for pulse width less than 10ns. 2. VIL(min) = VSS - 3.0V for pulse width less than 10ns. 3. Over/Undershoot specifications are characterized, not 100% tested. 4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(TYP.) and TA = 25 5. 1mA for special request 6. 50A for special request
CAPACITANCE (TA = 25, f = 1.0MHz)
PARAMETER Input Capacitance Input/Output Capacitance SYMBOL CIN CI/O MIN.
-
MAX 6 8
UNIT pF pF
Note : These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 4
(R)
LY61L6416
Rev. 1.8
64K X 16 BIT HIGH SPEED CMOS SRAM
AC TEST CONDITIONS
Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Levels Output Load 0.2V to VCC - 0.2V 3ns 1.5V CL = 30pF + 1TTL, IOH/IOL = -4mA/8mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
SYM. LY61L6416 LY61L6416 LY61L6416 LY61L6416 LY61L6416 UNIT -8 -10 -12 -15 -20 MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. ns Read Cycle Time 8 10 12 15 20 tRC ns Address Access Time 8 10 12 15 20 tAA ns Chip Enable Access Time 8 10 12 15 20 tACE ns Output Enable Access Time 4 5 6 7 8 tOE ns Chip Enable to Output in Low-Z 2 2 3 4 4 tCLZ* ns Output Enable to Output in Low-Z tOLZ* 0 0 0 0 0 ns Chip Disable to Output in High-Z 4 5 6 7 8 tCHZ* ns Output Disable to Output in High-Z tOHZ* 4 5 6 7 8 ns Output Hold from Address Change tOH 3 3 3 3 3 ns LB#, UB# Access Time 4 5 6 7 8 tBA ns LB#, UB# to High-Z Output 4 5 6 7 8 tBHZ* ns LB#, UB# to Low-Z Output 0 0 0 0 0 tBLZ* PARAMETER
(2) WRITE CYCLE
PARAMETER SYM. LY61L6416 LY61L6416 LY61L6416 LY61L6416 LY61L6416 UNIT -8 -10 -12 -15 -20 MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. 8 10 12 15 20 ns tWC 6.5 8 10 12 15 ns tAW 6.5 8 10 12 15 ns tCW 0 0 0 0 0 ns tAS 6.5 8 9 10 12 ns tWP 0 0 0 0 0 ns tWR 5 6 7 8 9 ns tDW 0 0 0 0 0 ns tDH 2 3 4 5 ns tOW* 1.5 5 6 7 8 9 ns tWHZ* 6.5 8 10 12 15 ns tBW
Write Cycle Time Address Valid to End of Write Chip Enable to End of Write Address Set-up Time Write Pulse Width Write Recovery Time Data to Write Time Overlap Data Hold from End of Write Time Output Active from End of Write Write to Output in High-Z LB#, UB# Valid to End of Write
*These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 5
(R)
LY61L6416
Rev. 1.8
64K X 16 BIT HIGH SPEED CMOS SRAM
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
tRC Address tAA Dout Previous Data Valid tOH Data Valid
READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5)
tRC Address tAA CE# tACE LB#,UB# tBA OE# tOE tOLZ tBLZ tCLZ Dout High-Z tOH tOHZ tBHZ tCHZ Data Valid High-Z
Notes : 1.WE#is high for read cycle. 2.Device is continuously selected OE# = low, CE# = low, LB# or UB# = low. 3.Address must be valid prior to or coincident with CE# = low, LB# or UB# = low transition; otherwise tAA is the limiting parameter. 4.tCLZ, tBLZ, tOLZ, tCHZ, tBHZ and tOHZ are specified with CL = 5pF. Transition is measured 500mV from steady state. 5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tBHZ is less than tBLZ, tOHZ is less than tOLZ.
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 6
(R)
LY61L6416
Rev. 1.8
64K X 16 BIT HIGH SPEED CMOS SRAM
WRITE CYCLE 1 (WE# Controlled) (1,2,3,5,6)
tWC Address tAW CE# tCW tBW LB#,UB# tAS WE# tWHZ Dout (4) High-Z tDW Din tDH TOW (4) tWP tWR
Data Valid
WRITE CYCLE 2 (CE# Controlled) (1,2,5,6)
tWC Address tAW CE# tAS tCW tBW LB#,UB# tWP WE# tWHZ Dout (4) High-Z tDW Din tDH tWR
Data Valid
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 7
(R)
LY61L6416
Rev. 1.8 WRITE CYCLE 3 (LB#,UB# Controlled) (1,2,5,6)
tWC Address tAW CE# tAS LB#,UB# tWP WE# tWHZ Dout (4) High-Z tDW Din tDH tCW tBW tWR
64K X 16 BIT HIGH SPEED CMOS SRAM
Data Valid
Notes : 1.WE#,CE#, LB#, UB# must be high during all address transitions. 2.A write occurs during the overlap of a low CE#, low WE#, LB# or UB# = low. 3.During a WE# controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be placed on the bus. 4.During this period, I/O pins are in the output state, and input signals must not be applied. 5.If the CE#, LB#, UB# low transition occurs simultaneously with or after WE# low transition, the outputs remain in a high impedance state. 6.tOW and tWHZ are specified with CL = 5pF. Transition is measured 500mV from steady state.
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 8
(R)
LY61L6416
Rev. 1.8
64K X 16 BIT HIGH SPEED CMOS SRAM
DATA RETENTION CHARACTERISTICS
PARAMETER VCC for Data Retention Data Retention Current Chip Disable to Data Retention Time Recovery Time tRC* = Read Cycle Time SYMBOL TEST CONDITION VDR CE# VCC - 0.2V IDR tCDR tR MIN. 2.0 8/10/12/15/20 0 tRC* TYP. 0.4 10 MAX. UNIT 3.6 V 2 mA 50 A ns ns
VCC = 2.0V CE# VCC - 0.2V others at 0.2V or VCC - 0.2V 20LL
See Data Retention Waveforms (below)
DATA RETENTION WAVEFORM
VDR 2.0V Vcc Vcc(min.) tCDR CE# VIH CE# Vcc-0.2V Vcc(min.) tR VIH
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 9
(R)
LY61L6416
Rev. 1.8
64K X 16 BIT HIGH SPEED CMOS SRAM
PACKAGE OUTLINE DIMENSION
44-pin 400mil TSOP- Package Outline Dimension
SYMBOLS A A1 A2 b c D E E1 e L ZD y
DIMENSIONS IN MILLMETERS MIN. NOM. MAX. 1.20 0.05 0.10 0.15 0.95 1.00 1.05 0.30 0.45 0.12 0.21 18.212 18.415 18.618 11.506 11.760 12.014 9.957 10.160 10.363 0.800 0.40 0.50 0.60 0.805 0.076 o o o 3 6 0
DIMENSIONS IN MILS MIN. NOM. MAX. 47.2 2.0 3.9 5.9 37.4 39.4 41.3 11.8 17.7 4.7 8.3 717 725 733 453 463 473 392 400 408 31.5 15.7 19.7 23.6 31.7 3 o o o 0 3 6
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 10
(R)
LY61L6416
Rev. 1.8
64K X 16 BIT HIGH SPEED CMOS SRAM
48-ball 6mm x 8mm TFBGA Package Outline Dimension
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 11
(R)
LY61L6416
Rev. 1.8
64K X 16 BIT HIGH SPEED CMOS SRAM
ORDERING INFORMATION
LY61L6416 U V - WW XX Y Z
Z : Packing Type Blank : Tube or Tray T : Tape Reel Y : Temperature Range Blank : (Commercial) 0C ~ 70C E : (Extended) -20C ~ +80C I : (Industrial) -40C ~ +85C XX : Power Type LL : Ultra Low Power WW : Access Time(Speed) V : Lead Information L : Green Package U : Package Type M : 44-pin 400 mil TSOP-II G : 48-ball 6 mm x 8 mm TFBGA
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 12
(R)
LY61L6416
Rev. 1.8
64K X 16 BIT HIGH SPEED CMOS SRAM
THIS PAGE IS LEFT BLANK INTENTIONALLY.
Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 13


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